1. Technical Field
This invention relates to an IC output circuit, more particularly, to a CMOS output circuit that permits switching between a CMOS output and an N-channel open drain output after it is fabricated as a complete IC product.
2. Background Art
A conventional output circuit for ICs such as a one-chip microcomputer that is capable of switching between a CMOS output and an N-channel open drain output is shown in FIG. 4. Transistor DT.sub.1 is an N-channel MOSFET (hereunder abbreviated as "NMOS"). To insure that the output circuit will produce a CMOS output, a depletion layer is formed under the gate of transistor DT.sub.1 in the IC fabrication process. As shown in FIG. 4, the gate of DT.sub.1 is grounded so that transistor DT.sub.1 will operate as a depletion-type MOSFET. Although its gate is at the ground potential, transistor DT.sub.1 is shorted between the source and the drain, whereby the circuit shown in FIG. 4 will produce a CMOS output.
If one wants to insure that the output circuit will produce an open drain output, no depletion layer is formed under the gate of transistor DT.sub.1 in the IC fabrication process but the gate is grounded, whereby transistor DT.sub.1 will operate as an enhancement-type MOSFET. Since the potential of the grounded gate is zero volts, transistor DT.sub.1 will turn off. As a result, the circuit shown in FIG. 4 will produce an N-channel open drain output. In this case, no current will flow from an output terminal 12 to the power supply, so even if the voltage at the output terminal becomes higher than a supply voltage V.sub.DD on the IC side, the latter voltage will not be increased. Hence the output circuit shown in FIG. 4 can be used as an output port having high withstand voltage.
Transistor DT.sub.1 may be designed as a circuit that performs switching between a CMOS output and an open-drain output by the ON-OFF control of the enhancement-type MOSFET; however, in this case, the high level of the CMOS output (hereunder abbreviated as "H") will not increase to the supply voltage, making it difficult for the output current to flow.
The output circuit of the type described above has the following additional problems. First, selection between a CMOS output and an open-drain output depends entirely upon the formation of a depletion layer under the gate of transistor DT.sub.1. In other words, the type of output to be produced is determined at the stage of fabrication and cannot be changed once a complete IC product is fabricated.
In order to avoid this difficulty, it has been proposed to design an open-drain output circuit that does not use transistor DT.sub.1 but which is operated by merely turning off a PMOS transistor Q.sub.1. However, if a voltage higher than the supply voltage V.sub.DD is applied to the output terminal 12, a parasitic diode in transistor Q.sub.1 will cause a current to flow from the drain of transistor Q.sub.1 to the power supply. As a result, the current will flow into the IC to elevate its supply voltage. Hence, the circuit under discussion cannot be operated as an output port having high withstand voltage.